Technical Specifications |
General Specifications |
Resolution |
14 bits |
Number of Channel Single-Ended Differential |
4 (8 optional)
4 (8 optional) |
Maximum Sampling Rate |
2 MS/s |
Onboard FIFO Size |
4k samples |
Input Ranges |
0-5 V, ±5 V,
0-8 V, ±8 V @
10 V ranges |
Channel-Gain List |
256 entries |
Programmable Gains
(by channel) |
G=1 (or 1, 2, 5, 10 with -DG option) |
Drift
|
Zero |
±30 µV/°C |
Gain |
±30 ppm/°C |
Input Impedance |
1 MΩ |
Input Bias Current |
±100 pA |
Input Overvoltage |
±18 V SE
±40 V DI |
A/D Conversion Time |
0.45 µs |
SSH Amp Settling Time |
0.7 µs |
A/D Settling Time |
0.4 µs |
DC Accuracy |
Nonlinearity
(no missing codes) |
±2 LSB |
AC Accuracy |
Effective Number of Bits |
12.1 |
Channel Crosstalk |
-80 dB @ 1 kS/s |
Clocking and Trigger Input |
Maximum A/D Pacer Clock |
1500 kS/s @ 4 ch,
1700 kS/s @ 8 ch |
External A/D Sample Clock Maximum Frequency |
1500 kS/s @ 4 ch,
1700 kS/s @ 8 ch |
Minimum Pulse Width |
20 ns |
External Digital (TTL)Trigger |
High-level Input Voltage |
2.0V min |
Low-level Input Voltage |
0.8V min |
Minimum Pulse Width |
20 ns |