Technical Specifications |
COUNTER/TIMER Functions |
Number of counter/timer units |
4 |
Resolution |
32 bits |
Prescaler (per channel) |
1 (32 bits) |
Maximum frequency |
16.5 MHz for external input clock;
66 MHz for internal input clock;
33 MHz for outputs |
Minimum frequency |
no low limits |
On-board FIFOs, per counter |
Input: 1024 x 32; Output: 1024 x 32 |
Minimum pulse width |
15.15 nS |
Minimum period |
30.30 nS |
Measurement resolution |
15.15 nS (standard mode)
7.5 nS (2X mode) |
Debouncer circuit size |
16 bits (on GATE and CLKIN) |
Compare registers per counter |
2 |
External gates per counter |
1, programmable polarity |
External triggers per counter |
1 (shared with Gate), edge sensitive, programmable polarity |
SYNCHRONOUS SERIAL Ports |
Baud Rate |
300 to 16 Megabaud (2 Mb sustained, 4 Mb max per DNA/DNR chassis |
Baud Rates available |
User selectable 0.1% accuracy or better |
Data Word Length |
3 - 32 bits |
FIFO (on each channel) |
Input: 1024 word, Output: 1024 word |
FrameSync phase control |
Programmable in 15.15 nS increments |
General |
Protection |
7 kV ESD, 350V isolation |
Input High / Low voltage |
RS-422/485 compatible |
Electrical Isolation |
350 Vrms, chan-chan and chan-chassis |
Output High / Low voltage |
RS-422/485 compatible |
Input/output buffer chip |
LTC1686 or equivalent |
Power consumption |
2W |
Operating Temp. (tested) |
-40°C to +85°C |
Operating Humidity |
0 - 95%, non-condensing |
Vibration |
IEC 60068-2-6 |
5 g, 10-500 Hz, sinusoida |
IEC 60068-2-64 |
5 g (rms), 10-500 Hz, broad-band random |
Shock IEC 60068-2-27 |
50 g, 3 ms half sine, 18 shocks @ 6 orientations
30 g, 11 ms half sine, 18 shocks @ 6 orientations |